David Kehlet is a researcher at Intel working on pathfinding for programmable logic technology. David is currently developing chiplets and chiplet technologies to enable a new model of electronic system development.  Earlier at Intel, David was Vice President of IP Engineering, developing communications protocols, signal processing, and memory interfaces on Intel's programmable logic devices.
Recently David represented Intel regarding chiplet technologies to the US Government, to industry and to Intel customers and partners. David earned BS and MS Electrical Engineering degrees from Stanford University and holds 18 patents.

Publications, Talks
“The Future of Electronics Packaging Security,” Presentation and panel hosted by the National Micro Electronics Security Training (MEST) Center, October 2021
Host: Navid Asadi, University of Florida

“Advanced Interface Bus (AIB) Die-to-Die PHY Deep Dive,” CHIPS Alliance workshop, August 2021
Host: Rob Mains, CHIPS Alliance
https://chipsalliance.org/wp-content/uploads/sites/83/2021/08/CHIPS_Alliance_AIB_Deep_Dive_081021.pdf

“Chiplet Technologies for an Emerging Ecosystem,” Keynote presentation at IEEE Design and Test of integrated micro & nano-Systems, June 2021
Host: Salem Abdennadher, Intel

“Security, Interface and Protocol Solutions for Chiplets in System-on-Chip Devices,” Paper and presentation at GOMACTech 2021, March 2021
Host: Shawn Fetterolf, Synopsys

“Package Security,” Panelist at IEEE International Conference on PHYSICAL ASSURANCE and INSPECTION of ELECTRONICS (PAINE), December 2020
Host: Dr. Waleed Khalil, Ohio State University

“Chiplet Technology for an Emerging Ecosystem,” Microelectronics Packaging & Test Engineering Council (MEPTEC) Semiconductor Industry Speaker Series, November 2020
Host: Ira Feldman

“Chiplet Technology and the SHIP Program,” Intel internal presentation to the Intel Federal Technology Forum, November 2020
Host: Debra Lavell

“Chiplet Technology for an Emerging Ecosystem,” Intel internal presentation to the Custom Logic Engineering Technology Forum, October 2020
Host: Salem Abdennadher

“Chiplet Ecosystem and Design Technology,” invited speaker at October 5 DARPA Principal Investigator meeting
Host: Dr. Gordon Keeler, DARPA

“The Emergence of the Open Source AIB Chiplet Ecosystem,” 2020 CHIPS Alliance Workshop, September 2020
Host: Ted Marena, CHIPS Alliance

Settaluri, Krishna and Kehlet, David, “Automated Mixed-Signal PHY Generation of the AIB Die-to-Die Interface,” Design Automation Conference (DAC) 2020, Chiplet Integration Tutorial, July 2020
Host: Farhang Yazdani

Wade, Mark, et al., “TeraPHY: A Chiplet Technology for LowPower, High-Bandwidth In-Package Optical I/O,” IEEE Micro, March/April 2020

Kehlet, David, “Chiplets on the Rise,” 2020 Heterogenous Integration Roadmap Symposium, February 2020, https://github.com/chipsalliance/aib-phy-hardware/blob/master/docs/IEEE_HIR_TWG_Chiplets_Kehlet_02_2020_v5.pdf
Host: William (Bill) Chen

Kehlet, David, “CHIPS Meets POSH & IDEA: The Advanced Interface Bus, Open Source and Physical Design Generation,” IDEA & POSH Integration Exercise, January 2020, https://github.com/chipsalliance/aib-phy-hardware/blob/master/docs/DARPA_POSH_SLC_AIB_01_2020_v3.pdf
Host: Andreas Olofsson, DARPA

Kehlet, David, “Accelerating Innovation Through a Standard Chiplet Interface: The Advanced Interface Bus (AIB),” Intel White Paper, 2019, https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/accelerating-innovation-through-aib-whitepaper.pdf

Sergey Y. Shumarayev, Conor O’Keeffe, Tim T. Hoang, David Kehlet, Sangeeta Raman, Benjamin Esposito, “A SiP Standard for Reusable Chiplet Enabled Platforms,” GOMACTech Conference, March 25-28, 2019 - Albuquerque, NM 

Kehlet, David, “Accelerating Innovation Through Chiplets at the OCP/ODSA Workshop,” June 2019, https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/f32e6901aac2933465214aa1aac44528a563d174.pdf